Integrated VLSI designing - Concept to Silicon
B.Tech (ECE) completed, or B.Tech (ECE) 3rd or 4th year / MBAs / any other PG
Trainers

Mr. Ryan Ebenezer, B.E (ECE)
DFT Engineer at Struent Semiconductors (P) Ltd, Chennai

Mr. Gopinath Polisetty, B.Tech (ECE)
Senior Design Engineer, Synapse Design Inc.

Mr. Bhaskar Reddy Jalapu, B.Tech (ECE)
Project Engineer Project Engineer, Synapse Design Inc.

Sri. Nikhil Batula, B.Tech and M.Tech
Staff SoC Engineer at Synopsys

Sri. Anurag Midha, BE, MBA, Senior Management Program IIM Ahmedabad
Co-founder & director at Talendroid

Mr. Khalid SMD, B.Tech
Design Verification Engineer at AISemiCon Pvt.Ltd

Sri. Veeramani, M.Tech in VLSI - NIT, Goa
Senior Engineer l - Synopsys

Sri. Satish Deverapalli, ME-IISc
Emulation Verification Manager at Apple

Mr. Prudhvi Kumar K Mtech in VLSI - NIT Goa
Silicon Design Engineer 2 - AMD , Bangalore

Mr. Dinesh G, B.Tech
ASIC Physical Design Engineer II - Synopsys Inc.

Ms. Reshma Subramanian, M.Tech, Microelectronics
Physical design engineer at Intel

Mr. Aditya Kumar, B.Tech & M.Tech in VLSI & Cyber Physical System, IIT - Jammu
DFT Engineer at Mediatek

Sri. Devi Prasad, B.Tech (ECE)
Verification Engineer -SV & UVM

Mr. Venkat Naveen Masina, Masters in VLSI Engineering
Design Verification Engineer, MeyvnSystems

Mr. Dev Chadha
R&D Engineer Trainee at Qbit Labs

Mr. Tarun Yellapu, Project Management , MIT
SoC Physical Design Verification and SignOff Engineer at Google
Github Projects
project1
GollaSailaja243
Integrated VLSI designing - Concept to Silicon
vending-machine-controller
Shankar-J-G3-Integrated-VLSI
Integrated VLSI designing - Concept to Silicon
SURE-Trust-Vending_Machine
prasannakumar1824
This is the design of Vending Machine ,which includes Reset Mode, configuration mode, operation mode. This is designed meeting with the real time vending machine specifications.
Integrated VLSI designing - Concept to Silicon
KATA_SUBRAMANYAM_G3_INTEGRATED_VLSI
Subbu-kata
This project is a fully functional Vending Machine Controller designed using Verilog HDL, featuring modular design, multi-clock domain handling, and APB-based configuration. The system supports both configuration and operation modes, allowing real-time selection, purchase, and dispensing of items based on valid currency input.
Integrated VLSI designing - Concept to Silicon