Integrated VLSI designing - Concept to Silicon

B.Tech (ECE) completed, or B.Tech (ECE) 3rd or 4th year / MBAs / any other PG

Trainers

Github Projects

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PALLA_PAVAN_KUMAR_DFT_PROJECT

PAVAN-KUMAR-PALLA

This project contains implementation and theoretical knowledge necessary for efficient post-manufacturing testing of integrated circuits, primarily through the use of scan chains. Scan chains connect flip-flops into a shift register, enhancing controllability and observability of internal nodes for defect detection.

Integrated VLSI designing - Concept to Silicon

VerilogPublic
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DFT-Project

Tharunkrishna123

**Scan Insertion** is a Design for Testability (DFT) technique where flip-flops are converted into **scan flip-flops (SFFs)** and linked into **scan chains**. This allows test vectors to be **shifted in and out**, giving controllability and observability of internal states.

Integrated VLSI designing - Concept to Silicon

VerilogPublic
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DFT-PROJECT-SURE_TRUST

Vijjvijay

This project focuses on implementation of a design with clock rules, DRC fixing, PLL integration, and scan insertion — gaining practical insights into real-world ASIC design flows.

Integrated VLSI designing - Concept to Silicon

VerilogPublic
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Vending-Machine-Controller

JnaneswarChandaka

This project is a Verilog RTL-based implementation of a configurable vending machine controller. It simulates a real vending system with support for dynamic item setup, asynchronous user input, and real-time dispensing logic. The design is modular, parameterized, and optimized for both configurability and fast operation.

Integrated VLSI designing - Concept to Silicon

VerilogPublic
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project__design-of-single-stage-differential-amplifier

Mani654

In this project, I designed and simulated a single-stage differential amplifier using 90nm CMOS technology in Cadence Virtuoso, an industry-standard tool for analog and mixed-signal (AMS) design.

Integrated VLSI designing - Concept to Silicon

Public
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Vending-Machine-Design

Susrutha144

This project implements a complete Vending Machine Controller in Verilog HDL, built with a modular architecture, support for multiple clock domains, and APB-based configuration. It operates in both configuration and operational modes, enabling real-time item selection, purchase, and dispensing based on valid currency inputs.

Integrated VLSI designing - Concept to Silicon

VerilogPublic
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Vending-machine-design

N-KEERTHI-2004

This project implements a Vending Machine Controller in Verilog, designed with APB interface support for configuration and monitoring. It integrates currency handling, item memory management, and control logic into a modular, scalable architecture.

Integrated VLSI designing - Concept to Silicon

VerilogPublic
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VENDING_MACHINE_CONTROLLER

MaramVenkataLakshmiPrasanna

his repository hosts the Vending Machine Controller (VMC) RTL design and its functional verification environment. The RTL, written in Verilog, supports up to 1024 programmable items with dynamic configuration via an APB interface.

Integrated VLSI designing - Concept to Silicon

Public
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RTL-TO-GDSII-FLOW-OF-RISC_V-32-BIT-PROCESSOR

Preethigrace-7

Build up myself with extendable knowledge from Fundamentals of VLSI to Chip Tapeout. Worked on RISCV 32bit processor from RTL to GDSII flow with specified Industry standard constraints using Open source tool Openlane.

Integrated VLSI designing - Concept to Silicon

Public
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Scan-insertion-with-DRC-and-coverage-analysis

Chanduu001

This project showcases the end-to-end design, modification, and verification of a digital circuit, emphasizing Design Rule Check (DRC) compliance and industry-standard practices. The work integrates both physical and logical design aspects, ensuring a reliable and testable implementation.

Integrated VLSI designing - Concept to Silicon

VerilogPublic
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Vending-Machine-Controller-Sure-Trust

sharan0908

This repository contains the RTL verification environment and testbench for a Vending Machine Controller design. The project focuses on verifying the functional correctness of the controller using UVM (Universal Verification Methodology).

Integrated VLSI designing - Concept to Silicon

Public
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SURETrust

navyachiluka

"VLSI Integrated" is a 6-month online internship that provides training across all domains of VLSI. In the final phase, we choose one specialization and complete a project in that area. I have opted for RTL Design and worked on a Vending Machine Controller. This repository contains all the modules related to the Vending Machine Controller project.

Integrated VLSI designing - Concept to Silicon

VerilogPublic
s

differential_amplifier

sunny0-vlsi

The project involves the design and analysis of a differential amplifier, a core analog circuit used to amplify the difference between two input signals while rejecting common-mode noise. It was implemented and simulated using Cadence Virtuoso, focusing on parameters like gain, CMRR, and biasing stability.

Integrated VLSI designing - Concept to Silicon

Public
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SURE-Trust-Vending_Machine

prasannakumar1824

This is the design of Vending Machine ,which includes Reset Mode, configuration mode, operation mode. This is designed meeting with the real time vending machine specifications.

Integrated VLSI designing - Concept to Silicon

VerilogPublic
S

KATA_SUBRAMANYAM_G3_INTEGRATED_VLSI

Subbu-kata

This project is a fully functional Vending Machine Controller designed using Verilog HDL, featuring modular design, multi-clock domain handling, and APB-based configuration. The system supports both configuration and operation modes, allowing real-time selection, purchase, and dispensing of items based on valid currency input.

Integrated VLSI designing - Concept to Silicon

VerilogPublic
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vending_machine

Krishnasa1

This project implements a Verilog-based Vending Machine Controller with support for APB configuration, item dispensing, and currency validation. It features FSM control, clock domain synchronization, and is fully synthesizable for FPGA applications.

Integrated VLSI designing - Concept to Silicon

VerilogPublic
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vending-machine

pasambaladitya123

This project, developed under SURE Trust, presents a scalable Verilog-based vending machine controller using FSM and modular RTL design. It handles asynchronous inputs, supports APB configuration, and enables real-time dispensing to enhance performance and flexibility.

Integrated VLSI designing - Concept to Silicon

VerilogPublic
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Vending-machine

Parinika-E

A Vending Machine Controller is a digital system that manages the operation of a vending machine,including item selection,dispensing and change/refund handling.it ensures correct item delivery based on user input and available balance using sequential logic

Integrated VLSI designing - Concept to Silicon

VerilogPublic
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Vending-Machine

SOWJANYA-MADANA

A Verilog-based RTL design of a configurable vending machine controller with APB configuration, asynchronous input handling, and real-time item dispensing.

Integrated VLSI designing - Concept to Silicon

VerilogPublic
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Vending-Machine

mramyasri777

This repository features a Verilog-based vending machine controller IP core, supporting multi-clock domain operation, inventory management, and currency denominations. Built with the APB protocol for efficient configuration, it offers smart change calculation and robust error handling. Developed in the SURE ProEd internship training with experts.

Integrated VLSI designing - Concept to Silicon

VerilogPublic
P

Vending-Machine

Preven-K

This repository features a Verilog-based vending machine controller IP core, supporting multi-clock domain operation, inventory management, and currency denominations. Built with the APB protocol for efficient configuration, it offers smart change calculation and robust error handling. Developed in the SURE ProEd internship training with experts.

Integrated VLSI designing - Concept to Silicon

VerilogPublic